Adlink Express-CVC Manuale Utente

Express-CVC User’s Manual Manual Revision: 2.01 Revision Date: December 12, 2014 Part Number: 50-1J043-1010

Page 10 Express-CVC 2.10. TPM (Trusted Platform Module) ¾ Chipset: Atmel AT97SC3204T, LPC type (optional) ¾ Type: TPM 1.2 2.11. Fan Control ¾ Co

Express-CVC Page 11 2.15. Functional Diagram SATA 3x PCIe x1 (port 0,1,2)CH7511NM10N2600N2800D2550 eDP/DPHDA Audio800/1067 MH

Page 12 Express-CVC 2.16. Mechanical Drawing

Express-CVC Page 13 3. COM Express Pinouts and Signal Descriptions The following information is a summary of the most important information regard

Page 14 Express-CVC A36 USB6- B36 USB7- C36 PCI_DEVSEL# D36 PCI_FRAME# A37 USB6+ B37 USB7+ C37 PCI_IRDY# D37 PCI_AD16 A38 USB_6_7_OC

Express-CVC Page 15 A86 KBD_RST# B86 VCC_5V_SBY C86 PEG_RX10- D86 PEG_TX10- A87 KBD_A20GATE B87 VCC_5V_SBY C87 GND D87 GND A88 PCIE0

Page 16 Express-CVC 3.2. Signal Description Terminology The following terms are used in the COM Express AB/CD Signal Descriptions below. I Inp

Express-CVC Page 17 3.3. AB Signal Descriptions 3.3.1. Audio Signals Signal Pin Description I/O PU/PD Comment AC_RST# / HDA_RST# A30 Reset

Page 18 Express-CVC 3.3.3. LVDS Signal Pin Description I/O PU/PD Comment LVDS_A0+ LVDS_A0- LVDS_A1+ LVDS_A1- LVDS_A2+ LVDS_A2- LVDS_A3+

Express-CVC Page 19 3.3.5. Serial ATA Signal Pin Description I/O PU/PD Comment SATA0_TX+ SATA0_TX- A16 A17 Serial ATA channel 0, Transmit

Page 2 Express-CVC Revision History Revision Description Date By 2.00 Initial release 2013-08-30 JC 2.01 Remove Industrial Temp. support 20

Page 20 Express-CVC 3.3.6. PCI Express Signal Pin Description I/O PU/PD Comment PCIE_TX0+ PCIE_TX0- A68 A69 PCI Express channel 0, Transmit

Express-CVC Page 21 3.3.8. LPC bus Signal Pin Description I/O PU/PD Comment LPC_AD[0:3] B4-B7 LPC multiplexed address, command and data bus

Page 22 Express-CVC 3.3.10. SPI (BIOS only) Signal Pin Description I/O PU/PD Comment SPI_CS# B97 Chip select for Carrier Board SPI BIOS Fl

Express-CVC Page 23 3.3.12. SMBus Signal Pin Description I/O PU/PD Comment SMB_CK B13 System Management Bus bidirectional clock line. Power

Page 24 Express-CVC 3.3.15. Power And System Management Signal Pin Description I/O PU/PD CommentPWRBTN# B12 Power button to bring system ou

Express-CVC Page 25 3.3.16. Power and Ground Signal Pin Description I/O PU/PD Comment VCC_12V A104-A109 B104-B109 Primary power input: +12V n

Page 26 Express-CVC 3.4. CD Signal Descriptions 3.4.1. PATA IDE Signal Pin Description I/O PU/PD Comment IDE_D0 IDE_D1 IDE_D2 IDE_D3 IDE_D4

Express-CVC Page 27 3.4.2. PCI Signal Pin Description I/O PU/PD Comment PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_A

Page 28 Express-CVC PCI_LOCK# C35 PCI Lock control line, active low. I/O 3.3V PU 8k2 3.3V PCI_SERR# D33 System Error: SERR# may be pulsed a

Express-CVC Page 29 3.4.3. PCI Express Graphics x16 (PEG) or SDVO PEG x16 Mode Signal Pin Description I/O PU/PD Comment PEG_RX0+ PEG_RX0- P

Express-CVC Page 3 Preface Copyright 2013-14 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All ri

Page 30 Express-CVC Signal Pin Description I/O PU/PD Comment PEG_TX14- PEG_TX15+ PEG_TX15- D99 D101 D102 PEG_LANE_RV# D54 PCI Express Grap

Express-CVC Page 31 3.4.4. Module Type Definition 3.4.5. Power and Ground Signal Pin Description I/O PU/PD Comment VCC_12V C104-C109 D104-D

Page 32 Express-CVC 4. Non PICMG Connectors on the Module This connector is a low height flex-edge connector. The overall board real estate requir

Express-CVC Page 33 5. System Resources 5.1. System Memory Map Address Range (decimal) Address Range (hex) Size Description (4GB-2MB) FFE0000

Page 34 Express-CVC 5.3. I/O Map Hex Range Device 000-01F DMA controller 020-02D and 030-03F Interrupt controller 02E-02F LPC SIO configuratio

Express-CVC Page 35 Hex Range Device CFC-CFF PCI configuration data register F00 Smbus base address for SB. 500 GPIO Base Address for SB 400

Page 36 Express-CVC APIC Mode IRQ# Typical Intterupt Resource Connected to Pin Available 0 Counter 0 N/A No 1 Keyboard controller N/A No 2

Express-CVC Page 37 5.5. PCI Configuration Space Map Bus Number Device Number Function Number Routing Description 00h 00h 00h N/A Intel Host

Page 38 Express-CVC 5.6. PCI Interrupt Routing Map INT Line P.E.G Root Port SATA Controller SMBUS Controller UHCI 0 UHCI 1 UHCI 2 UHCI 3 EHC

Express-CVC Page 39 6. BIOS Setup The following chapter describes basic navigation for the AMIBIOS®EFI BIOS setup utility. 6.1. Starting the BIOS

Page 4 Express-CVC Table of Contents Revision History ...

Page 40 Express-CVC 6.1.1. Setup Menu The main BIOS setup menu is the first screen that you can navigate. Each main BIOS setup menu option is desc

Express-CVC Page 41 6.1.2. Navigation The BIOS setup/utility uses a key-based navigation system called hot keys. Most of the BIOS setup utility ho

Page 42 Express-CVC Hot Key Description Enter The < Enter > key allows you to display or change the setup option listed for a particular

Express-CVC Page 43 F4 The < F4 > key allows you to save any changes you have made and exit Setup. Press the < F4 > key to save your

Page 44 Express-CVC 6.2. Main Setup

Express-CVC Page 45 6.2.1. System Management Power-Up Mode Turn On:The machine starts automatically when the power supply is turned on. Remain O

Page 46 Express-CVC Power-Up Watchdog The Power-Up Watchdog resets the system after a certain amount of time after power-up. System & Board Inf

Express-CVC Page 47 6.3. Advanced Setup 6.3.1. PCI Subsystem Settings PCI Latency Timer Value to be programmed into the PCI Latency Timer Regi

Page 48 Express-CVC 6.3.2. ACPI Settings Enable APIC Auto Configuration BIOS ACPI Auto Configuration. Set this value to Enabled/Disabled. Enab

Express-CVC Page 49 6.3.3. Trusted Computing Security Device Support Enables or Disables BIOS support for security device. OS will not show Secu

Express-CVC Page 5 3.3.11. Miscellaneous...

Page 50 Express-CVC Execute Disable Bit XD can prevent certain classes of malicious buffer overflow attacks when combined with a supporting OS (Win

Express-CVC Page 51 CPU Thermal Configuration DTS SMM Enabled: ACPI thermal management uses DTS SMM mechanism to obtain CPU temperature values.

Page 52 Express-CVC Platform Thermal Configuration Critical Trip Point This value controls the temperature of the ACPI Critical Trip Point - the

Express-CVC Page 53 6.3.6. IDE Configuration SATA Controller(s) Enables or disables SATA Controller. SATA-to-PATA controller Enable if system us

Page 54 Express-CVC Configure SATA as “AHCI” Port0/1 Speed Limit Select Port0/1 AHCI Speed Limit. SATA Port 0/1 Enable or Disable SATA Port 0/1.

Express-CVC Page 55 6.3.7. USB Configuration Legacy USB Support Enables Legacy USB support. AUTO option, disables legacy support if no USB devic

Page 56 Express-CVC 6.3.8. W8362DHG Super IO Configuration Floppy Disk Controller Configuration Change Settings This option specifies the base

Express-CVC Page 57 Device Mode Change mode of Floppy Disk Controller. Select 'Read Write' for normal operation. Select 'Write Prote

Page 58 Express-CVC Parallel Port Set Parameters of Parallel Port. Set this value to Enabled/Disabled. Change Settings This option specifies the

Express-CVC Page 59 6.3.9. Serial Port Console Redirection Console Redirection Console Redirection Enable or Disable. Console Redirection Settti

Page 6 Express-CVC 6.3.9. Serial Port Console Redirection...

Page 60 Express-CVC Terminal Type VT100+ is the preferred terminal type for out-of-band management. Configuration options: VT100, VT100+, VT-UTF8 ,

Express-CVC Page 61 6.3.10. PPM Configuration EIST Allows the clock speed of the processor to be dynamically changed. Set this value to Enabled/

Page 62 Express-CVC 6.4. Chipset Setup 6.4.1. Host Bridge Configuration

Express-CVC Page 63 Intel IGD Configuration IGFX-Boot Type Select the boot display device. Set this value to CRT, LFP, CRT+LFP. LCD Panel Type W

Page 64 Express-CVC LVDS Backlight Control LVDS Backlight control. Active LFP Select the boot display device.

Express-CVC Page 65 6.4.2. South Bridge TPT Device Enable/Disable Intel IO Controller Hub Devices. Azalia Controller The audio controller. Se

Page 66 Express-CVC Azalia Vci Enable Azalia supports 1 extended VC, which, when enabled, overrides ICH VCp settings Select USB Mode Select USB mod

Express-CVC Page 67 SLP_S4 Assertion Width Select a minimum assertion width of the SLP_S4# signal. LAN Controller Enable or disable the Ethernet C

Page 68 Express-CVC 6.5. Boot Setup Setup Prompt Timeout Number of seconds to wait for setup activation key. 65535 (0xFFFF) means indefinite wa

Express-CVC Page 69 6.6. Security Setup Administrator Password Set Administrator Password User Password Set User Password

Express-CVC Page 7 1. Introduction The Express-CVCis a low power, low cost, COM Express Type 2, COM.0 R2.1 module in Compact form factor that is

Page 70 Express-CVC 6.7. Save & Exit Menu Save Changes and Exit Exit system setup after saving the changes. Discard Changes and Exit Exit sy

Express-CVC Page 71 Safety Instructions Read and follow all instructions marked on the product and in the documentation before you operate your sys

Page 72 Express-CVC Getting Service ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan Tel:

Express-CVC Page 73 ADLINK Technology, Inc. (French Liaison Office) Address: 15 rue Emile Baudot, 91300 Massy CEDEX, France Tel: +33 (0) 1 60 1

Page 8 Express-CVC 2. Specifications 2.1. Core System ¾ CPU: Intel® Atom® Processor, 2-core with Integrated Graphics, FCBGA559 type • Dual-Cor

Express-CVC Page 9 2.4. Audio ¾ Integrated: Intel® HD Audio integrated in NM10 ¾ Audio Codec: Realtek ALC888 or 886 on Express-BASE 2.5. Ethern