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Pagina 1 - PXIe-9529

Advance Technologies; Automate the World.PXIe-95298-CH 24-Bit 192 kS/sDynamic Signal Acquisition ModuleUser’s ManualManual Rev.: 2.00Revision Date:

Pagina 2 - Revision History

x List of TablesThis page intentionally left blank.

Pagina 3 - Conventions

Introduction 1PXIe-95291 IntroductionThe PXIe-9529 is a high-performance 8-CH 24-Bit 192 kS/sdynamic signal acquisition module, specifically designed

Pagina 4 - WARNING:

2 Introduction1.2 ApplicationsX Structural health monitoringX Phase array data acquisitionX Noise, vibration, and harshness (NVH) detectionX Machine

Pagina 5 - Table of Contents

Introduction 3PXIe-9529Table 1-1: Channel CharacteristicsSNR, @fin = 1kHz103 dB fs = 8.0 kS104 dB fs = 54.0 kS99 dB fs = 108 kS98 dB fs = 192 kSTHD

Pagina 6

4 IntroductionFigure 1-1: Analog Input Channel Bandwidth, ±0.2 Vpp0 1 2 3 4 5 6x 104−25−20−15−10−50Magnitude ResponseFrequency (Hz)Magnitude (dB)

Pagina 7 - List of Figures

Introduction 5PXIe-9529Figure 1-2: Analog Input Channel Bandwidth, ±2 Vpp1.3.2 TimebaseTable 1-2: TimebaseSampling ClockTimebase optionsInternal: on

Pagina 8

6 Introduction1.3.3 TriggersTable 1-3: Trigger Source & ModeTable 1-4: Digital Trigger Input1.3.4 General SpecificationsTrigger Source & Mo

Pagina 9 - List of Tables

Introduction 7PXIe-95291.4 Software SupportADLINK provides versatile software drivers and packages to suitvarious user approaches to building a syste

Pagina 10

8 Introductionmeans all applications developed with DSA-DASK are compat-ible with these Windows operating systems. The developmentenvironment ma

Pagina 11 - 1 Introduction

Introduction 9PXIe-9529The PXIe-9529 I/O array is labeled to indicate connectivity, asshown.Figure 1-4: PXIe-9529 I/O Array

Pagina 12 - 1.3 Specifications

ii Revision HistoryRevision Release Date Description of Change(s)2.00 Oct. 31, 2013 Initial Release

Pagina 13

10 IntroductionThis page intentionally left blank.

Pagina 14 - 4 Introduction

Getting Started 11PXIe-95292 Getting StartedThis chapter describes proper installation environment, installationprocedures, package contents and bas

Pagina 15 - 1.3.2 Timebase

12 Getting StartedInspect the carton and packaging for damage. Shipping and han-dling could cause damage to the equipment inside. Make sure thatthe e

Pagina 16 - 1.3.4 General Specifications

Operations 13PXIe-95293 OperationsThis chapter contains information regarding analog input, trigger-ing and timing for the PXIe-9529.3.1 Functional B

Pagina 17 - 1.4 Software Support

14 OperationsDifferential and Pseudo-Differential Input Configuration The PXIe-9529 provides both differential and psuedo-differen-tial input configu

Pagina 18 - All dimensions are in mm

Operations 15PXIe-95293.2.2 Input Range and Data FormatWhen using an A/D converter, properties of the signal to be mea-sured should be considered pri

Pagina 19 - Introduction 9

16 Operationsat 27.648MS/s, 256 times the sampling rate. The 1-bit 27.648MS/sdata streams from 1-bit ADC to its internal digital filter circuit topro

Pagina 20 - 10 Introduction

Operations 17PXIe-9529ing OS, such as Microsoft Windows, Linux, or other, it is difficult toallocate a large continuous memory block. Therefore, the

Pagina 21 - 2 Getting Started

18 Operations3.3 Trigger Source and Trigger ModesFigure 3-3: Trigger ArchitectureThe PXIe-9529 requires a trigger to implement acquisition of data.Co

Pagina 22 - 2.2 Installing the Module

Operations 19PXIe-9529Figure 3-4: External Digital TriggerPXI STAR TriggerWhen PXI STAR is selected as the trigger source, thePXIe-9529 accepts a TTL

Pagina 23 - 3 Operations

Preface iiiPXIe-9529PrefaceCopyright 2013 ADLINK Technology, Inc.This document contains proprietary information protected by copy-right. All rights a

Pagina 24 - Ground-Reference Differential

20 Operationssignals from one of buses 0 through 7. When configured asoutput, the PXIe-9529 serves as a master module and can out-put trigger signals

Pagina 25

Operations 21PXIe-9529analog trigger source. The trigger level can be set by softwarewith 24-bit resolution, with characteristics as shown.Table 3-4

Pagina 26 - 3.2.4 DMA Data Transfer

22 OperationsFigure 3-6: Post-Trigger AcquisitionDelay Trigger ModeIf delay trigger mode is configured, delay time from when thetrigger event asserts

Pagina 27 - Operations 17

Operations 23PXIe-9529one clock period of PCIe CLK. After the initial setup, no addi-tional software intervention is required.Figure 3-8: Re-Trigger

Pagina 28 - 18 Operations

24 Operations3.5.2 DDS Timing vs. ADCTable 3-5: Timing Relationship between ADC and PLL Clock3.5.3 Filter Delay in ADCFilter delay indicates time re

Pagina 29 - Operations 19

Operations 25PXIe-9529allowing the single SSI master PXIe-9529 to output the SSI sig-nals to other slave modules. SSI timing signals and functions ar

Pagina 30 - Trigger Level

26 OperationsThe three internal timing signals can be routed to the PXI triggerbus through software drivers. Physically, signal routing is accom-plis

Pagina 31 - 3.4 Trigger Mode

Calibration 27PXIe-9529Appendix A CalibrationThis chapter introduces the calibration process to minimize analoginput measurement errors.A.1 Calibrat

Pagina 32 - 22 Operations

28 CalibrationBefore initializing auto-calibration, it is recommended to warm upthe PXIe-9529 for at least 20 minutes and remove connectedcables. NOT

Pagina 33 - 3.5.1 Timebase

Important Safety Instructions 29PXIe-9529Important Safety InstructionsFor user safety, please read and follow all instructions,WARNINGS, CAUTIONS, a

Pagina 34 - 3.5.3 Filter Delay in ADC

iv PrefaceNOTE:NOTE:Additional information, aids, and tips that help users perform tasks.CAUTION:Information to prevent minor physical injury, compon

Pagina 35

30 Important Safety InstructionsX Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.X A Lithium-type batt

Pagina 36 - 3.6.3 SSI_TRIG

Getting Service 31PXIe-9529Getting ServiceContact us should you require any service or assistance. ADLINK Technology, Inc. Address: 9F, No.166 Ji

Pagina 37 - Appendix A Calibration

32 Getting ServiceADLINK Technology, Inc. (French Liaison Office) Address: 15 rue Emile Baudot, 91300 Massy CEDEX, France Tel: +33 (0) 1 60 12

Pagina 38 - 28 Calibration

Table of Contents vPXIe-9529Table of ContentsPreface ... iiiList o

Pagina 39 - Important Safety Instructions

vi Table of Contents3.4 Trigger Mode... 213.5 ADC Timing Control ...

Pagina 40

List of Figures viiPXIe-9529List of FiguresFigure 1-1: Analog Input Channel Bandwidth, ±0.2 Vpp... 4Figure 1-2: Analog Input Channel Ban

Pagina 41 - Getting Service

viii List of FiguresThis page intentionally left blank.

Pagina 42 - 32 Getting Service

List of Tables ixPXIe-9529List of TablesTable 1-1: Channel Characteristics.............. 3Table 1-2: Timebase

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