Adlink CoreModule 430 Manuale Utente Scaricare il pdf (Pagina 22)

Chapter 3 Hardware

16 Reference Manual CoreModule 430

CPU

The CoreModule 430 offers two versions of an embedded microprocessor—the DMP Vortex 86SX and

86DX—operating at 300 and 800 MHz, respectively, combining a powerful x86 core and a selection of

peripheral interfaces onto one chip. The 86SX and 86DX integrate CPU, Northbridge, and Southbridge

functions. This single chip supports logic including PC/104, EIDE controllers and combines these with

standard I/O interfaces to provide a PC compatible subsystem on a single chip.

Graphics

The CoreModule 430 provides a single PCI graphics controller chip which integrates a 2D engine and a PCI

controller. The graphics controller incorporates a configurable 3.3V/2.5V DVO interface to support a third

party TMDS transmitter and achieves high 2D performance with a DDR2 memory interface supporting a

bandwith of up to 1 GB (DDR2 @ 250 MHz.)

Memory

The CoreModule 430 memory consists of the following element(s):

• System Memory

• Video Memory

• SPI Flash

System Memory

The CoreModule 430 provides two 16-bit, DDR2 memory chips of up to 128MB each for a total of up to

256MB of system memory soldered to the module and operating at 166MHz.

Video Memory

The CoreModule 430 provides one 16-bit, DDR2 memory chip of 32MB of video memory soldered to the

module and operating at 166MHz.

SPI Flash

The CoreModule 430 features an on-board 16Mbit SPI Flash device, operating as a virtual Floppy Disk

Drive. The board supports both the SPI Flash and an SPI header on the external SPI Bus. Enable the SPI

Flash through the Boot screen of the BIOS Setup Utility. Refer to the Chapter 1 for a link to the SPI Flash

data sheet.

NOTE ADLINK Technology, Inc. only supports the features and options listed in this

manual. The main components used on the CoreModule 430 may provide more

features or options than are listed in this manual. Some of these features/options

are not supported on the module and will not function as specified in the chip

documentation.

Only the pinout tables of non-standard headers and connectors are included in

this chapter. This chapter does not include pinout tables for standard headers and

connectors such as PC/104, 44-pin IDE, and Compact Flash.

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Adlink CoreModule 430 Manuale Utente Pagina 22

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